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Cell-Based Design Automation for Mixed-Signal Circuits

August 17 @ 6:00 pm - 7:00 pm

Cell-based, synthesizable mixed-signal circuits such as ADPLLs, ADCs, and LDOs are gaining significant traction. This is fueled by the exponentially increasing number of DRC rules in advanced nodes, added restrictions on custom layout, and overall increase in design time for full-custom, analog designs. This talk focuses on a different technique for analog design automation that borrows from the digital design flow. I will show how we can describe ADPLLs and LDOs using a combination of standard cells, and a small number of auxiliary cells. These aux cells are no larger than a D-flipflop, and are drawn on the standard cell grid. This means they can be included in existing digital synthesis and automatic place & route (APR) flows, leveraging these very powerful commercial tools. I will present our innovations at the architecture level, and on how we drive the EDA tools, in order to improve performance. Examples and measurement results will be shown, from fabricated ADPLLs and LDOs in TSMC 65nm and GF 12nm, demonstrating the ease of porting these designs across processes.
Speaker(s): , David Wentzloff
Virtual: https://events.vtools.ieee.org/m/369117


August 17
6:00 pm - 7:00 pm


Virtual: https://events.vtools.ieee.org/m/369117